Message signaled interrupts (MSI) are a feature that enables a device function to request service by writing a system-specified data value to a system-specified address using, for example, a PCI (Peripheral Components Interconnect) DWORD (double word) memory write transaction. MSI is optional for PCI specifications through PCI Local Bus Specification Rev. 3.0, Feb. 3, 2004, may be used in PCI Express (PCIe) Specifications (PCIe Specification, Revision 1.0a, June 2005), and is included in PCI-X specifications (PCI-X Specification Rev. 2.0a, Apr. 23, 2003). Moreover, MSI is an interrupt-generation mechanism that enables a PCI device to send an inbound memory write on its PCI bus to a front side bus that may be coupled to a processor, bypassing an IO×APIC (input output advance programmable interrupt controller).
MSI-X is an enhancement to MSI. MSI and MSI-X are described in PCI Local Bus Specification, Rev. 3.0, section 6.8, pp. 231-253. MSI and MSI-X may however be inefficient as the interrupts are generally communicated via a host system, in turn, causing potentially significant delays.